邊緣計算、物聯網和消費類終端設備需要以相對較低的功率、價格和晶片尺寸成本進行高性能推論處理。計算和程式設計效率是最先進的AI晶片設計的主要驅動力。這是一個非常依賴軟體/硬體共同設計的領域,但大部分軟體遠遠落後於硬體。本講座將介紹一個系統設計框架和方法,以重塑邊緣AI推理晶片設計。

Edge computing, IoT and consumer endpoint devices, need high-performance inference processing at relatively low cost in power, price and die size. Computational and programming efficiency are the major driving forces for the state-of-the-art AI chip design. It is a segment where soft-ware/hardware co-design is a necessity, but much of the software is far be-hind the hardware. This talk will introduce a system design framework and approach for reshaping AI inference chip design at the edge. It enables system-level simulation, early-stage design space exploration, and driving the definition of next-generation hardware platform specification.