Abstract 

In the ubiquitous computing era, High-Performance, Low-Power IC design is a basic requirement for innovation. However, “Process Scaling”, 5nm, 3nm, 2nm …,is almost at the end of the road in about five years. “Advanced Material” in Semiconductor manufacturing process is still not mature. “2.5D/3D Packaging” has become a trend in IC designs. In this packaging technology, we can have heterogeneous integration design architecture, for the desired application, such as Cloud/Edge computing. Therefore, the transfer bandwidth with lower power consumption among dies is one of the keys in this solution. This speaker is an alumni of CSE Department, NSYSU. He received his master’s degree in 1998 under the supervision of Prof. Shen-Fu Hsiao.In this presentation, he will introduce D2D interconnection PHY IP and its applications.