Speech Brief:

Edge computing, IoT and consumer endpoint devices, need high-performance inference processing at relatively low cost in power, price and die size. Computational and programming efficiency are the major driving forces for the state-of-the-art AI chip design. It is a segment where soft-ware/hardware co-design is a necessity, but much of the software is far be-hind the hardware. This talk will introduce a system design framework and approach for reshaping AI inference chip design at the edge. It enables system-level simulation, early-stage design space exploration, and driving the definition of next-generation hardware platform specification.